JPH0543311B2 - - Google Patents

Info

Publication number
JPH0543311B2
JPH0543311B2 JP62246892A JP24689287A JPH0543311B2 JP H0543311 B2 JPH0543311 B2 JP H0543311B2 JP 62246892 A JP62246892 A JP 62246892A JP 24689287 A JP24689287 A JP 24689287A JP H0543311 B2 JPH0543311 B2 JP H0543311B2
Authority
JP
Japan
Prior art keywords
sheet
conductive
conductive circuit
hole
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62246892A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6489586A (en
Inventor
Shoichi Shimizu
Koji Udagawa
Yosuke Ishiguro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP24689287A priority Critical patent/JPS6489586A/ja
Publication of JPS6489586A publication Critical patent/JPS6489586A/ja
Publication of JPH0543311B2 publication Critical patent/JPH0543311B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP24689287A 1987-09-30 1987-09-30 Printed board Granted JPS6489586A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24689287A JPS6489586A (en) 1987-09-30 1987-09-30 Printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24689287A JPS6489586A (en) 1987-09-30 1987-09-30 Printed board

Publications (2)

Publication Number Publication Date
JPS6489586A JPS6489586A (en) 1989-04-04
JPH0543311B2 true JPH0543311B2 (en]) 1993-07-01

Family

ID=17155293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24689287A Granted JPS6489586A (en) 1987-09-30 1987-09-30 Printed board

Country Status (1)

Country Link
JP (1) JPS6489586A (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6252176B1 (en) 1996-04-19 2001-06-26 Fuji Xerox Co., Ltd. Printed wiring board, and manufacture thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0357285U (en]) * 1989-08-03 1991-05-31

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5593287A (en) * 1979-01-08 1980-07-15 Hitachi Ltd Method of fabricating printed circuit board
JPS59232495A (ja) * 1983-06-15 1984-12-27 松下電工株式会社 多層配線基板の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6252176B1 (en) 1996-04-19 2001-06-26 Fuji Xerox Co., Ltd. Printed wiring board, and manufacture thereof

Also Published As

Publication number Publication date
JPS6489586A (en) 1989-04-04

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees